A plasma display device using a PDP (plasma display panel) has an advantage of enabling reduction in thickness and realization of a large screen, whose development has been advanced (refer to JP 2002-156941 A, for example).
In the PDP, a plurality of data electrodes are arranged in a vertical direction, a plurality of pairs of scan electrode and sustain electrode are arranged in a horizontal direction, and discharge cells are formed at intersections thereof. The plurality of data electrodes are driven by a data driver.
Serial data obtained based on a video signal is provided to the data driver. The data driver includes a plurality of latch circuits (flip-flop circuits) and a shift register. The serial data provided to the data driver is stored in the shift register while being latched in the latch circuits in response to a shift clock (clock signal). Thereafter, the serial data stored in the shift register is converted into parallel data. Based on the parallel data, drive pulses are applied to the plurality of data electrodes.
However, if a distance between the positions in which the serial data and the shift clock are generated and the position of the data driver is large, a length of a transmission line that transmits those serial data and the shift clock is large. Thus, the phases of the serial data and the shift clock may be changed, thereby causing a latch failure in the data driver.
The latch failure means that a value of a data string outputted from a latch circuit is different from a value of a data string inputted into the latch circuit by deviation of the phase of the data string inputted into the latch circuit or the phase of the clock signal from a normal phase.